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Full Description

Scope

This standard specifies extensions to STIL.0 that define the description of certain test flow and binning components of an integrated circuit (IC) test program in a test-hardware-independent manner. These extensions provide language constructs and semantics necessary to describe both the test program flow and the sequencing data needed to compose a test program to run on an automated test equipment (ATE) platform. The language constructs defined include structures for specifying the following: *Order of execution of test program components *Hierarchical test flow structures to facilitate automated modification or maintenance *Common interfaces between the test flow environment and test program components *Test flow variables to facilitate concurrent and serial test flow interactions *Binning or categorization of tested ICs The following aspects integral to test execution are specifically not addressed by this standard: *The standardization of the interface between the prober or handler and tester is beyond the scope of STIL.4. STIL.4 requires that appropriate AsynchronousEvent signals shall be issued to the TestProgram triggering the corresponding entry-points. * Input/output operations and exception handling. * The definition of TestMethods is beyond the scope of this standard.

Purpose

STIL is the standard for the interchange of digital test data from the test generation environment (where a great deal of design information is used to generate device tests) to the test and manufacturing environment. The initial STIL standard (IEEE Std 1450-1999) addresses the essential digital test description information (i.e., signals, timing, vectors, and parameter specifications). Other aspects needed for testing devices are provided in extension activities such as this standard, which addresses test flow extensions to STIL. The flow and binning constructs in this extension allow for developing a test program description in a common language; this common description can either be used as input to a test program generator that translates the description into the native language of specific IC ATE systems or be run directly on IC ATE systems that use IEEE 1450.4 as their native language.

Abstract

New IEEE Standard - Active - Draft. This standard extends IEEE Std 1450-1999 (STIL) to 39 provide an interface between test generation tools and test equipment with regard to the specification of the flow of execution of test program components. It defines structures such that test flows, sub-flows, and binning may be described in a manner that facilitates automated generation, modification, and/or manual maintenance, and although not yet a complete run-time test language, execution on automated test equipment (ATE). It defines an interface between tester configurations (described by IEEE Std 1450-1999 and IEEE 1450.2-2002) and test program components. It defines a hierarchy of flows, sub-flows, and test components. It defines structures for defining flow related variables and processing expressions involving those variables. It provides structures that support automatic test program generation (ATPRG) and translation, and running it natively as an ATE programming language. As an adjunct, IEEE Std 1450.3-2007, may be used by ATPRG for tester rules checking.