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ASTM F374

2002 Edition, December 10, 2002

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Standard Test Method for Sheet Resistance of Silicon Epitaxial, Diffused, Polysilicon, and Ion-implanted Layers Using an In-Line Four-Point Probe with the Single-Configuration Procedure



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Product Details:

  • Revision: 2002 Edition, December 10, 2002
  • Published Date: December 10, 2002
  • Status: Not Active, See comments below
  • Document Language: English
  • Published By: ASTM International (ASTM)
  • Page Count: 17
  • ANSI Approved: No
  • DoD Adopted: No

Description / Abstract:

This test method covers the direct measurement of the average sheet resistance of thin layers of silicon with diameters greater than 15.9 mm (0.625 in.) which are formed by epitaxy, diffusion, or implantation onto or below the surface of a circular silicon wafer having the opposite conductivity type from the thin layer to be measured or by the deposition of polysilicon over an insulating layer. Measurements are made at the center of the wafer using a single-configuration of the four-probe, that is, with the current being passed through the outer pins and the resulting potential difference being measured with the inner pins.

This test method is known to be applicable on films having thickness at least 0.2 µm. It can be used to measure sheet resistance in the range 10 to 5000 Ω, inclusive.

The principle of the test method can be extended to cover lower or higher values of sheet resistance; however, the precision of the method has not been evaluated for sheet resistance ranges other than those given in 1.2.

NOTE 1 - The minimum value of the diameter is related to tolerances on the accuracy of the measurement through the geometric correction factor. The minimum layer thickness is related to danger of penetration of the probe tips through the layer during measurement.

Procedures for preparing the specimen, for measuring its size, and for determining the temperature of the specimen during the measurement are also given. Abbreviated tables of correction factors appropriate to circular geometry are included with the method so that appropriate calculations can be made conveniently.

NOTE 2 - The principles of this test method are also applicable to other semiconductor materials, but neither the appropriate conditions nor the expected precision have been determined. Other geometries can also be measured, but only comparative measurements using similar geometrical conditions should be used unless proper geometrical correction factors are known.

NOTE 3 - Some relaxations of test conditions are mentioned in order to assist in applying the principles of the method to nonreferee applications, for which a complete nonreferee method has not yet been developed. The relaxed test conditions given are consensus conditions only and their effect on measurement precision and accuracy has not been explored.

The values stated in SI units are to be regarded as the standard. The values given in parentheses are for information only.

This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use. Specific hazard statements are given in Section 9.