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IEC TR 63051

1st Edition, January 1, 2017

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Documentation on design automation subjects – Mathematical algorithm hardware description languages for system level modeling and verification (HDLMath)

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Description / Abstract:

A hardware description language provides a means to describe the behavior of a system precisely and concisely. This document describes the main functional requirements for an HDLMath language and compares existing HDLMath languages from the viewpoint of designers. It is intended to accelerate the standardization of a mathematical algorithm design language and to help establish a new and good system modeling and verification environment.