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IEEE 1149.1

2013 Edition, February 6, 2013

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Test Access Port and Boundary-Scan Architecture



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Referenced Items:

IEEE 100
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Description / Abstract:

This standard defines test logic that can be included in an integrated circuit to provide standardized approaches to:

- Testing the interconnections between integrated circuits once they have been assembled onto a printed circuit board or other substrate

- Testing the integrated circuit itself

- Observing or modifying circuit activity during the component's normal operation

The test logic consists of a boundary-scan register and other building blocks and is accessed through a test access port (TAP).