Chip-On-Flex (COF) – Surface mounted chip attached directly onto flexible printed boards. Chip-On-Glass (COG) – An assembly technology that uses an unpackaged semiconductor die mounted directly on a glass substrate such as a glass plate for liquid crystal display (LCD). Clinched Lead – A component lead that is inserted through a hole in a printed board and is then formed in order to retain the component in place to make metal-to-metal contact with a land prior to soldering. See also ‘‘Partially- Clinched Lead.’’ Clinched-Wire Through Connection – A connection made by a bare wire that has been passed through a hole in a printed board and subsequently formed (clinched) and soldered to the conductive pattern on each side of the board (see Figure 1-3). Coined Lead – The end of a round lead that has been formed to have parallel surfaces that approximate the shape of a ribbon lead. Conductive Paste – A conductive material used for thick film circuits that is a creamy mixture of metal powders and a vehicle material. A conductor is produced by screen printing the paste on a base material and then firing or curing.This document provides information for preparation of components for assembly to printed boards, contains a review of some pertinent design criteria, impacts and issues, techniques of general interest for assembly (both manual and machines) and discusses considerations of, and impacts upon, subsequent soldering, cleaning, and coating processes. The information herein consists of compiled data representing commercial and industrial applications.
This section discusses general recommended assembly guidelines. Later sections discuss information concerning specific packaging types.
Sections 2 through 5 provide guidelines for the specific component within each sectional document. The parts are described in detail and each section outlines specifics affecting the part class. The descriptions and classifications provided are those generally used in the industry with reference to military and commercial applications.
Due to the rapid progress and evolution in packaging and assembly technology today, this document may not cover all currently available components or assembly techniques such as lead free.
The purpose of this document is to illustrate and guide the user seeking answers to questions related to accepted, effective methods of mounting components to printed wiring boards.
Classification of Board Types and Assemblies
Three general end-product classes have been established to reflect progressive increases in sophistication, functional performance requirements and testing/inspection frequency. It should be recognized that there could be an overlap of equipment between classes. These performance classes are the same for both bare boards and assemblies. The printed board user has the responsibility to determine the class to which his product belongs. The contract shall specify the performance class required and indicate any exceptions to specific parameters, where appropriate.
Class 1 – General Electronic Products
Includes consumer products, some computers and computer peripherals suitable for applications where cosmetic imperfections are not important and the major requirement is the function of the completed electronic assembly.
Class 2 – Dedicated Service Electronic Products
Includes communications equipment, sophisticated business machines, and instruments where high performance and extended life is required and for which uninterrupted service is desired but not critical. Certain cosmetic imperfections are allowed.
Class 3 – High Performance Electronic Products
Includes the equipment and products where continued performance or performance-on-demand is critical, such as in life support items or flight control systems. Equipment downtime cannot be tolerated and must function when required. Assemblies in this class are suitable for applications where high levels of assurance are required, service is essential, or the end-use environment may be uncommonly harsh.
IPC standards usually provide three design complexity levels of features, tolerances, measurements, assembly, testing of completion or verification of the manufacturing process that reflect progressive increases in sophistication of tooling, materials or processing and, therefore, progressive increases in fabrication cost. These levels are:
• Level A – General Design Complexity - Preferred
• Level B – Moderate Design Complexity - Standard
• Level C – High Design Complexity - Reduced Producibility
The producibility levels are not to be interpreted as a design requirement, but a method of communicating the degree of difficulty of a feature between design and fabrication/assembly facilities. The use of one level for a specific feature does not mean that other features must be of the same level. Selection should always be based on the minimum need, while recognizing that the precision, performance, conductive pattern density, assembly and testing requirements determine the design producibility level. The numbers listed within the numerous tables are to be used as a guide in determining what the level of producibility is for any feature. The specific requirement for any feature that must be controlled on the end item should be specified on the master drawing of the printed board or the printed board assembly drawing.
These levels for assemblies are:
• Level A – Through-hole component mounting only.
• Level B – Surface mounted components only.
• Level C – Simplistic through-hole and surface mounting intermixed assembly.
• Level X – Complex intermixed assembly, through-hole, surface mount, fine pitch and BGA.
• Level Y – Complex intermixed assembly, through-hole, surface mount, ultra fine pitch and chip scale.
• Level Z – Complex intermixed assembly, through-hole, ultra fine pitch, COB, flip chip, and TAB.
It is important to understand the complex relationship between board types and assembly classifications. The term ‘‘board’’ no longer refers just to rigid boards. It now includes single-sided, double-sided and multilayer boards made from rigid, flexible, rigid-flex combinations or boards with high-density microvia dielectric material combinations.
This guideline recognizes that printed boards and printed board assemblies are subject to classifications by intended end item use and other designations based on assembly characteristics. Classification of producibility is related to complexity of the design and the precision required to produce the particular printed board or printed board assembly. Any producibility level or producibility design characteristic may be applied to any end-product equipment category. Therefore, a high-reliability product designated as Class 3 (see 1.2.2) could require Level A design complexity (preferred producibility) for many of the attributes of the printed board or printed board assembly.
Rigid Board Types
The following rigid board types are classified in IPC-2222 and IPC-6012, Design and Qualification and Performance Specification for Rigid Printed Boards:
• Type 1: Single-Sided Printed Board.
• Type 2: Double-Sided Printed Board.
• Type 3: Multilayer Board without Blind or Buried Vias.
• Type 4: Multilayer Board with Blind and/or Buried Vias.
• Type 5: Multilayer Metal-Core Board without Blind or Buried Vias.
• Type 6: Multilayer Metal-Core Board with Blind and/or Buried Vias.
Flexible Printed Boards
The following flexible printed board types are classified in IPC-2223 and IPC- 6013, Qualification and Performance Specifications for Flexible Printed Boards:
• Type 1: Single-sided flexible printed wiring containing one conductive layer, with or without stiffeners.
• Type 2: Double-sided flexible printed wiring containing two conductive layers with plated-through holes, with or without stiffeners.
• Type 3: Multilayer flexible printed wiring containing three or more conductive layers with platedthrough holes, with or without stiffeners.
• Type 4: Multilayer rigid and flexible material combinations containing three or more conductive layers with plated-through holes.
• Type 5: Flexible or rigid-flex printed wiring containing two or more conductive layers without platedthrough holes.
PC Card Printed Boards
PC Card printed boards are classified by IPC-2224, Sectional Standard for Design of PWBs for PC Cards.
Single-Chip and Multichip Printed Boards
Single chip and multichip printed boards are classified in IPC- 2225 and IPC-6015, Design and Qualification and Performance Specification from Organic Multichip Module Mounting and Interconnecting Structures.
High Density Interconnect Printed Boards
The following HDI printed board types are classified in accordance with IPC-2226 and IPC-6016, Design Qualification and Performance Specification for High Density Interconnect (HDI):
• Type I – 1 [C] 0 or 1 [C] 1 with through-vias from surface to surface.
• Type II – 1 [C] 0 or 1 [C] 1 with through-vias buried in the core and from surface to surface.
• Type III – Greater/equal 2 [C] greater/equal to 0.
• Type IV – P greater/equal to 0 where P is a passive substrate with no electrical connecting functions.
• Type V – Coreless constructions using layer pairs.
• Type VI – Alternate constructions in which electrical interconnections and mechanical structure are formed simultaneously.
Printed Circuit Board Assembly Types
A type designation signifies further sophistication describing whether components are mounted on one or both sides of the packaging and interconnecting structure. Type 1 (Figure 1-1) defines an assembly that has components mounted on only one side; Type 2 (Figure 1-2) is an assembly with components on both sides.
The need to apply certain design concepts should depend on the complexity and precision required to produce a particular land pattern or printed board structure. Any design class may be applied to any of the end-product equipment categories. Therefore, a moderate complexity (Type 1B) would define components mounted on one side (all surface mounted) and, when used in a Class 2 product (dedicated service electronics), is referred to as type 1B, Class 2. The product described as Type 1B, Class 2 might be used in any of the end-use applications with the selection of class being dependent on the requirements of the customers using the application. See Table 1-1 for description of various board and assembly types.
Order of Precedence
In the event of any conflict in the development of new designs, the following order of precedence shall prevail:
1. The procurement contract.
2. The approved master drawing or assembly drawing (supplemented by an approved deviation list, if applicable).
3. This standard.
4. Other applicable documents.
All dimensions, tolerances and other forms of measurement (temperature, weight, etc.) in this standard are expressed in SI (System International) units with Imperial English equivalent dimensions provided in brackets. Dimensions and tolerances use millimeters as the main form of dimensional expression; micrometers are used when the precision required makes millimeters too cumbersome. Celsius is used to express temperature. Weight is expressed in grams. Users are cautioned to employ a single dimensioning system, and not intermix millimeters and inches. Reference information is shown in parentheses.
Terms and Definitions
The definition of all terms used herein shall be as specified in IPC-T-50 (those terms denoted with an asterisk are cited directly from IPC-T-50), or as listed below:
Anisotropic Conductive Contact – An electrical connection using an anisotropic conductive film or paste wherein conductive particles of gold, silver, nickel, solder, etc., are dispersed. When it is compressed, an electrical connection is attained only in the direction of compression.
Application Specific Integrated Circuit (ASIC) – A semiconductor device intended to satisfy a unique circuit function.
Axial Lead – Lead wire extending from a component or module body along its longitudinal axis.
Ball Lift – A category of ball bond failure in which the ball lifts from the surface of the integrated circuit die bond pad metallization or lifts the metallization from the surface of the underlying oxide or silicon.
Ball Grid Array (BGA) – A surface mount package wherein the bumps for terminations are formed in a grid on the bottom of a package.
Ball Bond* – The welded connection of a bond wire to the bond pad of an integrated circuit die. The bond wire is melted to form a ball and the ball is bonded by use of thermo-compression or thermosonic techniques.
Bonding Time (Reflow) – The time duration from the commencement of thermode heatup until the reflow thermo profile is completed.
Castellation – A recessed metallized feature on the edge of a leadless chip carrier that is used to interconnect conducting surfaces or planes within or on the chip carrier.
Ceramic Quad Flat Pack (CQFP) – A Quad Flat Package (QFP) made of a ceramic material hermetically sealed with leads extending from all four sides.
Ceramic Pin Grid Array (CPGA) – A pin grid array package (PGA) made of a ceramic material, hermetically sealed by metal, with leads formed on a grid extending from the bottom of the package.
Ceramic Dual-Inline-Package (CERDIP) – A dual-inlinepackage that has a package body of ceramic material and hermetically sealed by a glass; (see also ‘‘Dual-Inline- Package’’).
Chip Carrier – A low profile, usually square, surfacemount component semiconductor package whose die cavity or die mounting area is a large fraction of the package size and whose external connections are usually on all four sides of the package. (It can be leaded or leadless.)
Chip Component – A component designed for surface mounting with two or more terminations, attachable with solder or electrically conductive adhesive.
Chip-In-Board (CIB) – An electronic component chip is inserted into an opening of a ceramic or glass-epoxy substrate and bonded by wire bonding or TAB techniques. The object of this technique is to reduce the thickness of the Chip-On-Board assembly. A resin may cover the chip after bonding.
Chip-On-Board Assembly – A printed board assembly using a combination of uncased chips and other devices. The silicon area density is less than 30%.
Chip-On-Glass (COG) – An assembly technology that uses an unpackaged semiconductor die mounted directly on a glass substrate such as a glass plate for liquid crystal display (LCD).
Clinched Lead – A component lead that is inserted through a hole in a printed board and is then formed in order to retain the component in place to make metal-to-metal contact with a land prior to soldering. See also ‘‘Partially- Clinched Lead.’’
Clinched-Wire Through Connection – A connection made by a bare wire that has been passed through a hole in a printed board and subsequently formed (clinched) and soldered to the conductive pattern on each side of the board (see Figure 1-3).
Coined Lead – The end of a round lead that has been formed to have parallel surfaces that approximate the shape of a ribbon lead.
Conductive Paste – A conductive material used for thick film circuits that is a creamy mixture of metal powders and a vehicle material. A conductor is produced by screen printing the paste on a base material and then firing or curing.
Conductive Pattern – The configuration or design of the conductive material on a base material. (This includes conductors, lands, vias, heatsinks and passive components when these are an integral part of the printed board manufacturing process.)
Controlled Collapse Bonding (CCB) – A bonding technique that makes termination by reflowing the solder bump on a chip and connecting it to the land on the printed board.
Controlled Collapse Soldering* – A technique for soldering a component (i.e., flip chip, chip scale package, BGA) to a substrate, where the component connection surface tension forces of the liquid solder supports the weight of the component and controls the height of the joint.
Component Lead – The solid or stranded wire or formed conductor that extends from a component to serve as a mechanical or electrical connector, or both.
Component Pin – A component lead that is not readily formable without being damaged.
Coplanarity – The distance in height between the lowest and highest leads, terminations or bumps when the component is in its seating plane.
Design for Reliability (DfR) – Design procedure to assure long-term reliability of electronic assembly.
Die – The uncased and normally leadless form of an electronic component that is active or passive, discrete or integrated.
Die Pad – A land on which the integrated circuit die is mounted during the assembly process using adhesives.
Dual-Inline Package (DIP) – A basically-rectangular component package that has a row of leads extending from each of the longer side of its body that are formed at right angles to a plane that is parallel to the base of its body.
Eyelet – A short metallic tube, the ends of which can be formed outward in order to fasten it within a hole in material such as a printed board.
Face Down Bonding – A type of integrated circuit bonding wherein the die circuitry faces the substrate or the lead frame.
Face Up Bonding – A type of integrated circuit bonding wherein the back of the die is attached to a base material.
Fine Pitch QFP – A quad flat pack package with the lead pitch less than 0.625 mm.
Fisheye (Prepreg)* – A localized area of the reinforcement where the resin coverage is significantly diminished although intact, forming a circular depression, much like a hollow volcano.
Flat Pack – A rectangular component package that has a row of leads extending from each of the longer sides of its body that are parallel to the base of its body.
Gull Wing Leads – An SMT lead form. Leads extending horizontally from the component body centerline, bent downward immediately past the body and then bent outward just below the bottom of the body, thus forming the shape of a gull’s wing.
Heat Absorption Coefficient – The degree to which various materials absorb heat or radiant energy.
Humidity Aging – The exposure to a humid environment as a preconditioning before testing components, printed boards, or assemblies.
Inner Layer – See ‘‘Internal Layer.’’
J-Leads – The preferred surface mount lead form used on PLCCs, so named because the lead departs the package body near its Z axis centerline, is formed down then rolled under the package. Leads so formed are shaped like the letter ‘‘J.’’
Land – A portion of a conductive pattern usually, but not exclusively, used for the connection and/or attachment of components.
Land Pattern – A combination of lands that is used for the mounting, interconnection and testing of a particular component.
Land Grid Array (LGA) – A square or rectangular package with termination lands located in a grid pattern on the bottom of the package.
Large-Scale Integrated Circuit (LSI) – An integrated circuit with over 100 gates.
Lead Extension – Part of a lead or wire that extends beyond a solder connection.
Lead Frame* – The metal frame on which the integrated circuit die is mounted and bonded during the assembly process.
Lead Fingers – The interior ends of the lead frame leads to which the bond wires from the integrated circuit are connected.
Leadless Chip Carrier (LCC) – A chip carrier whose external connections consist of leads that are around and down the side of the package; (see also ‘‘Leadless Device’’).
Leadless Device – See ‘‘Die’’ and ‘‘Leadless Surface Mount Component.’’
Leadless Surface-Mount Component – A surface-mount component whose external connections consist of metallized terminations that are an integral part of the component body; (see also ‘‘Leaded Surface-Mount Component’’).
Leaded Surface-Mount Component – A surface-mount component for which external connections consist of leads that are around and down the side of the package; (see also ‘‘Leadless Surface-Mount Component’’).
Least Material Condition (LMC) – The condition in which a feature of size contains the least amount of material within the stated limits of size.
Locating Accuracy– The accuracy in the positioning of a component described by the amount of displacement (i.e., diameter of true position) from the desired position.
Manufacturing Exposure Time (Component) – The time after bake that the component manufacturer requires to process the components prior to bag seal, including a default amount of time to account for shipping and handling.
Maximum Material Condition (MMC) – A drawing defining certain characteristics of the printed board, such material within the stated limits of size.
Metal Electrode Face (MELF) – MELF leadless components have metallized terminals at both ends of a cylindrical body.
Migration (Pressure Sensitive Tape) – The movement over a long period of time of an ingredient from one component to another when the two are in surface contact. May occur between tape components or between the tape and the surface to which it is applied.
Mixed Component Mounting Technology – A component mounting technology that uses both through-hole and surface-mounting technologies on the same packaging and interconnecting structure.
Molded Interconnection Device (MID) – A combination of molded plastic substrate and conductive patterns that provides both the mechanical and electrical functions of an electronic interconnection package.
Mounting Tack Time – The interval of time required for mounting one component or all components in the solder paste on a printed board.
Multichip Module (MCM)* – A multichip module consisting primarily of closely-spaced integrated circuit dice that have a silicon area density of 30% or more.
Multichip Module-Ceramic (MCM-C) – Multichip modules where the materials of the mounting structure are ceramic or glass-ceramic alternatives; (see also ‘‘Multichip Module’’).
Multichip Module-Deposited (MCM-D) – Multichip modules where unreinforced dielectric and conductive materials are added sequentially to form an interconnect structure on a substrate; (see also ‘‘Multichip Module’’).
Multichip Module-Laminate (MCM-L) – Multichip modules primarily using printed board manufacturing processes and materials; (see also ‘‘Multichip Module’’).
Package Cracking – Cracks in a plastic integrated circuit package caused by stress that results from exposure to reflow solder temperature. These cracks may propagate from the die or die pad to the surface of the package, or only extend part way to the surface or lead fingers.
Planar Resistor – An etched or deposited resistive element incorporated within or on the surface of the printed board.
Plastic Ball Grid Array (PBGA) – A polymer based package with interconnects formed of tin-lead solder spheres. The solder interconnects are located in an array area on the bottom side of package.
Plastic Leaded Chip Carrier (PLCC) – A surface mount family of integrated circuit packages with J-leads extending from all four sides of the package, generally with a 1.27 mm lead-to-lead pitch.
Plastic Quad Flat Pack (PQFP) – A surface mount family of integrated circuit packages with leads exiting from all four sides of the package and formed into ‘‘gull-wing’’ lead format.
Polarized Component – A component wherein the terminations are assigned as positive or negative electrical polarity.
Quad Flat Pack (QFP) – A square component package with leads that are formed in ‘‘gull-wing’’ shape and extend from the four sides of the body.
Quad Flat Pack With Bumpers (BQFP) – A QFP package with guarding bumpers at the four corners to protect the leads from damage.
Radial Lead Component – A component where the leads are located on the bottom, radially and parallel to the central axis.
Radial Lead – Lead wire extending from the axis of a component or module body at the mounting surface.
Rectangular Lead – A lead form or leg shape whose crosssection is rectangular in shape.
Reflow – The joining of surfaces that have been tinned and/or have solder between them, placing them together, heating them until the solder flows, and allowing the surface and the solder to cool in the joined position.
Seating Plane – The surface of a substrate on which a component rests.
Self-Alignment Effect – A force that pulls an SMD to the center of the land by the surface tension of the solder during reflow soldering.
Shrink Sop (SSOP) – A family of component packages with four sizes, each having the ability to provide lead pitches between 0.68 mm and 0.3 mm.
Single Chip Package (SCP) – An integrated circuit package containing only one semiconductor die.
Single In-Line Package (SIP)* – A component package that terminates in one straight row of pins or leads.
Small Outline (SO) – See page 46 of DRM-18F for definition.
Small Outline I-Leaded Package (SOI) – A component package of SOP type with the leads shaped like the letter ‘‘I.’’
Small Outline Integrated Circuit (SOIC) – A surface mount family of integrated circuit packages with two rows of formed leads with 1.27 mm pitch (center-to-center spacing). Lead formation may be ‘‘J’’ or ‘‘gull wing.’’
Small Outline J-Leaded Package (SOJ) – Small outline package (SOP) with J-leads.
Small Outline Package (SOP) – An integrated circuit package with leads of ‘‘gull wing’’ shape extending from two sides of its body.
Small Outline Transistors (SOT) – SOTs are rectangular transistor or diode packages with three or more gull-wing leads.
Surface Mounting* – The electrical connection of components to the surface of a conductive pattern that does not utilize component holes.
Surface Mount Component – A leaded or leadless device (part) that is capable of being attached to a printed board by surface mounting.
Surface Mount Device – See ‘‘Surface Mount Component (SMC).’’
Thin Quad Flat Pack (TQFP) – A surface mount family of integrated circuit packages with a thin plastic body.
Thin Small Outline Package (TSOP) – A package that has the same features as the Small Outline Package except that its thickness is reduced to 0.8 mm - 1.2 mm.
Through-hole Mounting – The electrical connection of components to a conductive pattern by the use of component holes.
Transistor Outline (TO) – JEDEC Designation for Transistor Packaging Outline.
Tray – A pallet intended to contain surface mount devices (SMD) designed to make it easy to feed them to an automatic component-mounting machine.
Through Hole – The electrical connection of components to a conductive pattern by the use of component holes.
Very Large Scale Integrated Circuit (VLSI) – Integrated circuits with more than 80,000 transistors on a single die that are interconnected with conductors that are 1 micron or less in width.
Wire Bond Degradation – A weakening of an integrated circuit ball bond due to stress caused by exposure to reflow soldering temperatures resulting in possible reduction of component reliability.
Zigzag In-Line Package – A package with in-line leads on one side that is arranged in zigzag fashion.
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