J-STD-003 Revision C, September 2013
Solderability Tests for Printed Boards
Includes all amendments and changes through Amendment 1, May 2014
Additional Comments: SEE ALSO J-STD-003 CD
Published By:Association Connecting Electronics Industries (IPC)
This standard prescribes test methods, defect definitions, and illustrations for assessing the solderability of printed wiring board surface conductors, attachment lands, and plated-through holes (PTHs). This standard is intended for use by both user and supplier.
This standard is not intended to verify the potential of successful processing at assembly or to evaluate design impact on wettability. This standard describes procedures or methods to determine the acceptable wettability of a surface finish. Wettability can be affected by handling, finish application, and environmental conditions.
Purpose This standard describes solderability determinations that are made to verify that the printed board fabrication processes and subsequent storage have had no adverse effect on the solderability of those portions of the printed board intended to be soldered. Reference coupons or representative portions of a printed board may be used. Solderability is determined by evaluation of a test specimen which has been processed as part of a panel of boards and subsequently removed for testing per the method selected.