1779488

JEDEC JESD 12-6

ADDENDUM No. 6 to JESD12 - INTERFACE STANDARD FOR SEMICUSTOM INTEGRATED CIRCUITS

Amendment by JEDEC Solid State Technology Association , 03/01/1991

This document is an amendment. View the base document.

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This standard defines logic interface levels for CMOS, TTL, ECL, and BiCC inputs and outputs. This standard is intended to provide an industry-wide set of specifications, for Application Specific Integrated Circuit (ASIC) signal inputs and outputs, both necessary and sufficient to define a circuits electrical interfacing with the external environment. JESD12-6 is intended to provide the ASIC manufacturer and user with a common set of signal interface levels. The standard defines interface levels for 5 volt operation.
 

Product Details

Published:
03/01/1991
Number of Pages:
13
File Size:
1 file , 510 KB
Note:
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