Hello. Sign In
Standards Store
MIL-HDBK-815 1994 Edition, November 7, 1994
Complete Document
Active, Most Current
Includes all amendments and changes through Validation Notice 3, September 5, 2012
$47.00 USD
In Stock
Print  :
$51.00 USD
In Stock
Print + PDF :
$68.60 USD
You save 30%
In Stock
The scope of this document is limited to dose-rate radiation effects on semiconductor electronics and is specifically intended to address hardness assurance at the piece-part level. Because the nature of dose-rate effects sometimes requires a close interaction between system hardness assurance and piece-part hardness assurance, some system requirements are also discussed.

This document is written primarily for those individuals who are involved with hardness assurance activities. It also provides a guide for designers of radiation hardened systems and, as a result, is an aid in developing hardness assurance design documentation (HADD).

This document primarily discusses piece-part hardness assurance methods for the dose-rate environment, and addresses system hardness assurance topics only as they are necessary to complete the discussion of piece part hardness assurance. Thus, the discussion will deal with the radiation categorizing of piece-parts according to certain criteria, which will determine the controls needed during part procurement. Specific activities and functions which may be significantly different for different systems and for different contracting organizations will not be discussed in detail in this document.

Certain dose-rate dependent problems, such as burnout and latchup, cannot effectively be handled at the piece-part level. In these cases, system and circuit-level, or both design solutions may be the most effective means of ensuring survival.

This section provides a brief overview of the important elements of dose-rate hardness assurance. The following sections of the document will address some of these issues in greater detail. A summary of dose-rate effects is shown on figure 1.

The dose-rate environment produces transient current surges in semiconductor devices. In a single junction, the current is called photocurrent (Ip) and flows in the direction of junction leakage current. In transistors, the current surge in the collector-base junction is called the primary photocurrent (Ipp) and may, in certain cases, be amplified by the transistor gain to produce secondary photocurrents (Isp).

In discrete devices, the photocurrent may appear as a transient noise pulse, interfering with the normal operation of the device or the circuit in which it is used. If the radiation is intense enough and if the resulting energy deposited in the device is great enough, the device may burn out.

Dose-rate effects in integrated circuits are similar to the effects observed in discrete devices. One common term which is used to describe the dose-rate effect in integrated circuits is "upset." The device is said to have upset when the dose-rate effect results in the device being in an unwanted operating state as a result of the radiation. For example, the dose rate response of bipolar linear circuits may appear as an output voltage transient lasting 10 or more microseconds, along with power supply surge currents. Digital circuits may experience a change in output state, a change of state of stored data (bit flip), or simply a deviation in output voltage which is defined as being unacceptable for proper operation of the device. In most cases, the device will recover and continue to function normally, once the radiation pulse terminates and the induced transient subsides. However, if sufficient energy is available, the device may be damaged and may not recover after the radiation pulse.

In both linear and digital integrated circuits, the device may experience an effect called four-layer latchup. Should the device enter a latchup condition, the circuit will cease to operate normally, and may in fact burn out. A summary of these effects is shown on figure 1.

It should be noted that the parts must be categorized separately for each dose-rate radiation effect. For example, a dielectrically isolated integrated circuit may be judged to be HNC for latchup but a HCC-1 for upset. Therefore, the device would be categorized as HCC-1.

Hardness assurance for piece parts takes place during the system production and parts procurement phases. The tests and screens which were determined during the design phase, and are described in detail in the hardness assurance design documentation (HADD), are put into effect during the hardness assurance phase.

This is a collection of information on the design hardening techniques used, the survivability/vulnerability analysis, configuration and quality control, test data, procurement specifications, management, and any other information necessary for production of the system: 1/

These documents may vary between systems, but a common set would contain the following:

a. An introduction. Providing a general systems operation and functional description.

b. An HCI Index. Providing a hardness critical item list which relates hardness critical parts to their application. The hardness criticality is indicated and cross-referenced to analysis.

c. A hardness assurance plan. Presenting the management organization and technical requirements which are to be implemented throughout the production period.

d. An analysis discussion. Containing the survivability/vulnerability analysis and any related information.