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MIL-M-28787/82 Revision A, January 18, 1980
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MODULES, STANDARD ELECTRONIC INVERTER, DIGITAL KEY
Includes all amendments and changes through Cancellation Notice 2, August 13, 2013
Additional Comments: CNCL NO S/S
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This document establishes the requirements and test procedures for the procurement of an electronic digital inverter module.

The following electrical parameters reflect the 0° to 60°C end-of-life limits from table II.
        Name                                Inverter

        Family                              Digital

        Key code                            RBG

        Size                                1A

        Weight                              35 grams maximum

        Failure rate                        0.788 failures/106 hours maximum

∗       Environment                         Class I as specified in MIL-STD-1389

        Supply voltage                      5 Vdc ±10 percent

        Maximum power dissipation
          All outputs at low level          891 mW (outputs not loaded)
          All outputs at high level         396 mW (outputs not loaded)

        Input voltage
          Low level                         −0.5 V minimum, 0.8 V maximum
          High level                         2.0 V minimum, VCC maximum

        Input current
          Low level  (VIL = 0.0 V)          −2.2 mA maximum
                     (VIL = 0.5 V)          −2.0 mA maximum
          High level (VIH = 2.5 V)          50.0 µA maximum
                     (VIH = 5.5 V)          1 mA maximum


Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Commander, Naval Electronic Systems Command, ATTN: ELEX 5043, Department of the Navy, Washington, DC 20360, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.
        Output voltage
          Low level  (IOL = 20 mA)               0.5 V maximum
          High level (IOH = −1 mA)               2.5 V minimum

        Output drive current maximum
          capability
            Low level  (VOL = 0.5 V)             20 mA
            High level (VOH = 2.5 V)             −1.0 mA

    ∗    Propagation delay time (tPLH)
          ( 50 pF load)                          2.0 ns minimum,  8.0 ns maximum
          (150 pF load)                          4.0 ns minimum, 12.0 ns maximum

        Propagation delay time (tPHL)
          ( 50 pF load)                          2.0 ns minimum,  8.0 ns maximum
          (150 pF load)                          4.0 ns minimum, 12.0 ns maximum

        Delta propagation delay time (ΔtPLH)
          (50 pF load)
            Between inverters 1, 2, 3            3.0 ns maximum
            Between inverters 4, 5, 6            3.0 ns maximum
            Between inverters 7, 8, 9            3.0 ns maximum
            Between inverters 10, 11, 12         3.0 ns maximum
            Between inverters 13, 14, 15         3.0 ns maximum
            Between inverters 16, 17, 18         3.0 ns maximum

        Delta propagation delay time (ΔtPHL)
          (50 pF load)
            Between inverters 1, 2, 3            3.0 ns maximum
            Between inverters 4, 5, 6            3.0 ns maximum
            Between inverters 7, 8, 9            3.0 ns maximum
            Between inverters 10, 11, 12         3.0 ns maximum
            Between inverters 13, 14, 15         3.0 ns maximum
            Between inverters 16, 17, 18         3.0 ns maximum




This module contains 18 independent logic inverters.

Each inverter has the input to output relationship of table I for positive logic. TABLE I. Input to output relationship.
Input (A)   Output (B)
-----------------------
    L           H
    H           L

NOTES:
  1. H = High-voltage level.
  2. L = Low-voltage level.




Paralleling of outputs to obtain extended drive is permissible only when parallel inputs and outputs are confined within each group specified below. The output drive capability of this combination is equal to the sum of the output drive capabilities of the individual circuits. The circuit groups which can be paralled are:

a. Circuits 1, 2, and 3.

b. Circuits 4, 5, and 6.

c. Circuits 7, 8, and 9.

d. Circuits 10, 11, and 12.

e. Circuits 13, 14, and 15.

f. Circuits 16, 17, and 18.

All electrical parameters are measured with pins 3, 10, and 18 connected separately to 0 volt return. System problems may result from a different grounding method.

The module has the following crosstalk relationship

When connected in the worst case mode of operation (all outputs but one switching simultaneously from a high level to a low level), the RBG module could exhibit substantial crosstalk. When the quiet line is a low level, there may be as much as an 800 mV positive going spike coincident with the negative edge of the switching outputs.

The crosstalk on any output pin is nearly directly pro portional to the number of switching outputs. For every switching output in group A (circuits 1-3) the noise induced on a low level quiet output in group A is as much as 137 mV. For every switching output outside group A (circuits 4-18), the noise induced on a low level quiet output in group A is as much as 35 mV. The preceeding relationsh also hold for group B (circuits 4-6), group C (circuits 7-9), group D (circuits 10-12) group E (circuits 13-15) and group F (circuits 16-18).