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MIL-M-38510/244 Revision B, July 30, 1984
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MICROCIRCUITS, DIGITAL, NMOS, 65,536 BIT, DYNAMIC RANDOM ACCESS MEMORY (DRAM), MONOLITHIC SILICON
Includes all amendments and changes through Validation Notice 4, November 9, 2010
Additional Comments: INACTIVE FOR NEW DESIGN
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This specification covers the detail requirements for monolithic silicon, N-channel, dynamic, NMOS, 65,536/1-bit, random access memory microcircuits utilizing a 128 cycle refresh architecture and having pin number 1 as a no-connect. Two product assurance classes are provided and are reflected in the complete part number.

The part number shall be in accordance with MIL-M-38510, and as specified herein.

The device type shall be as follows:
        Device type              Circuit organization   Access time         Refresh

01 (Tcase = −55°C instant-on       65,536/1-bit RAM       150 ns       128 Cycles (1 ms)
    to +110°C operating) 1/
02 (Tcase = −55°C instant-on       65,536/1-bit RAM       150 ns       128 Cycles (2 ms)
    to +110°C operating) 1/
03 (Tcase = −55°C instant-on       65,536/1-bit RAM       200 ns       128 Cycles (2 ms)
    to +110°C operating) 1/




The device class shall be the product assurance level as defined in MIL-M-38510.

The case outline shall be designated as follows:
   Letter                   Case outline (see MIL-M-38510, appendix C)
      E               D-2 (16-lead, ¼" × ⅞"), dual-in-line package
      Z               C-10 (18 terminal, .285" × .425"), chip carrier package




  Voltage on any pin relative to VSS- - - - - -   −1.5 V to +7 V
  Storage temperature range (ambient) - - - - -   −65°C to +150°C
  Power dissipation (minimum cycle time)  - - -   1.0 W maximum
  Thermal resistance (minimum cycle time) - - -   θJC = 15°C/W maximum
  Lead temperature (soldering, 5 seconds) - - -   270°C maximum
  Maximum junction temperature (TJ) - - - - - -   +150°C
  Short circuit output current- - - - - - - - -   150 mA




Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center, RBE-2, Griffiss ABF, NY 13441, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.

The error rate shall not exceed 1 error in 1 × 106 device operating hours, under the following test conditions:

a. VCC = 4.5 V

b. TC = 25°C.

c. Device in a checkerboard pattern.

d. Cycle time equal to 250 ns.

Supply voltages:                              Min      Max      Unit
  VCC - - - - - - - - - - - - - - - - - - -   4.5      5.5      V dc
  VSS - - - - - - - - - - - - - - - - - - -    0 2/     0 2/    V dc
High-level input voltage:
  All inputs (VIH)- - - - - - - - - - - - -   2.4      6.5      V dc
Low-level input voltage:
  All inputs (VIL)- - - - - - - - - - - - -   −1.5     0.8      V dc
Refresh cycle time (tREF)
  Device type 01- - - - - - - - - - - - - - -   ---      1.0      ms
  Device types 02 and 03- - - - - - - - - - -   ---      2.0      ms
Case operating temperature range (TC) - - -   −55     +110      °C