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Revision B, February 1996

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Electrical Characteristics of Unbalanced Voltage Digital Interface Circuits

Includes all amendments and changes through Reaffirmation Notice , December 2012

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Product Details:

  • Revision: Revision B, February 1996
  • Published Date: December 7, 2012
  • Status: Active, Most Current
  • Document Language: English
  • Published By: Telecommunications Industry Association (TIA)
  • Page Count: 42
  • ANSI Approved: No
  • DoD Adopted: No

Description / Abstract:

This Standard specifies the electrical characteristics of the unbalanced voltage digital interface circuit, normally implemented in integrated circuit .technology, that may be employed when specified for the interchange of serial binary signals between Data Terminal Equipment (DTE) and Data Circuit-Terminating Equipment (DCE) or in any point-to-point interconnection of serial binary signals between digital equipment.

This Standard is compatible with ITU-T (Formerly CCilT) Recommendation V.l O.

The interface circuit includes a generator connected by a interconnecting cable to a load consisting of a receiver or receivers. The electrical characteristics of the circuit are specified in terms of required voltage, current, and resistance values obtained from direct measurements of the generator and receiver components at the interface points. The logic function of the generator and the receiver is not defined by this Standard, as it is application dependent. The requirements for signal wave shaping, generally necessary to reduce unbalanced circuit near-end crosstalk to adjacent circuits, are also described. The receiver specification for the unbalanced interface is identical to that specified for the balanced interface circuit in TINEIA-422-B. Minimum performance requirements for the interconnecting cable are furnished. Guidance is given in Annex A.l with respect to limitations on data signaling rate imposed by the parameters of the cable length and generation of near-end crosstalk.

The parameter values specified for the unbalanced generator and load components of the interface are designed such that unbalanced interface circuits may be used within the same interconnection as balanced interface circuits specified by TINEIA-422-B. For example, the balanced circuits may be used for data and timing while the unbalanced circuits may be used for low speed control functions. In addition, interoperation may be possible under certain conditions with generators and receivers of other digital interface standards such as EIWIA-232-E (see Annex B Section B.l).

It is intended that this Standard will be referenced by other standards that specify the complete DTE/DCE interface (Le., connector, pin .assignments, function) for applications where the electrical characteristics of an unbalanced voltage digital interface circuit are required. This Standard does not specify other characteristics of the DTE/DCE interface (such as signal quality and timing, etc.) essential for proper operation across the interface.

When this Standard is referenced by other standards or specifications, it should be noted that certain options are available. The preparer of those referencing standards and specifications must determine and specify those optional features which are required for that application.