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SEMI M1 (Complete Document)
Revision / Edition: 11    Chg:    Date: 11/00/11   Abbreviations Definitions
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SPECIFICATIONS FOR POLISHED SINGLE CRYSTAL SILICON WAFERS
Additional Comments:SEND CUSTOMER DIRECT * 650 940 7924
Published By:Semiconductor Equipment and Materials Institute (SEMI)
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Description / Abstract Back to Top
These specifications cover ordering information and certain requirements for high-purity (electronic grade), single crystal polished silicon wafers used in semiconductor device and integrated circuit manufacturing. Such wafers are usually sliced from cylindrical single-crystal ingots that have been ground to a uniform diameter prior to slicing. These specifications also cover ordering information and certain requirements for electronic grade silicon wafers intended for use as substrates (or starting wafers) for other kinds of wafers, including epitaxial, annealed, and SOI wafers.

Dimensional requirements are provided for the following categories of polished wafers:

Category 1.1 2 inch polished single crystal silicon wafers with secondary flat

Category 1.2 3 inch polished single crystal silicon wafers with secondary flat

Category 1.5 100 mm polished single crystal silicon wafers, 525 μm thick, with secondary flat

Category 1.6 100 mm polished single crystal silicon wafers, 625 μm thick, with secondary flat

Category 1.7 125 mm polished single crystal silicon wafers with secondary flat

Category 1.8.1 150 mm polished single crystal silicon wafers with secondary flat and T/3 edge profile template

Category 1.8.2 150 mm polished single crystal silicon wafers with secondary flat and T/4 edge profile template

Category 1.9.1 200 mm notched polished single crystal silicon wafers with T/3 edge profile template

Category 1.9.2 200 mm notched polished single crystal silicon wafers with T/4 edge profile template

Category 1.9.3 200 mm notched polished single crystal silicon wafers with parameter-specified edge profile

Category 1.10.1 200 mm flatted polished single crystal silicon wafers with T/3 edge profile template without secondary flat

Category 1.10.2 200 mm flatted polished single crystal silicon wafers with T/4 edge profile template without secondary flat

Category 1.11 100 mm flatted polished single crystal silicon wafers without secondary flat

Category 1.12 125 mm flatted polished single crystal silicon wafers without secondary flat

Category 1.13.1 150 mm flatted polished single crystal silicon wafers with T/3 edge profile template without secondary flat

Category 1.13.2 150 mm flatted polished single crystal silicon wafers with T/4 edge profile template without secondary flat

Category 1.15 300 mm notched polished single crystal silicon wafers Category

1.15.1 300 mm notched polished single crystal silicon wafers with parameter-specified edge profile

Category 1.16.1 450 mm polished single crystal silicon wafers with notch centered on less-than110greater-than axis

Category 1.16.2 450 mm polished single crystal silicon wafers with notch centered on less-than100greater-than axis

Values given for thickness, total thickness variation (TTV), bow, and warp apply only to wafers prior to application of back surface films, extrinsic gettering treatments, or other thermal treatments.

The dimensional characteristics of Category 1.10.1, 1.10.2, 1.11, 1.12, 1.13.1, and 1.13.2 wafers specified in this document are identical with those specified in JEITA EM-3602, and the dimensional characteristics of Category 1.15 wafers are essentially equivalent with those specified in JEITA EM-3602.

A complete purchase specification requires that additional physical properties be specified along with test methods suitable for determining their magnitude. This Standard provides a comprehensive listing of such properties and associated test methods. This listing provides a systematic basis for constructing the purchase specification for any kind of polished silicon wafer or substrate and is expected to be used for such purposes.

These specifications apply specifically to prime silicon wafers with at least one chem-mechanically polished surface. Ground, lapped, and unpolished wafers are not covered in this Specification but this Specification may provide guidance in connection with their procurement.

In addition, these specifications cover specification requirements for basic 300 mm diameter, double-side polished silicon wafers that are suitable for many advanced integrated circuit applications. If this kind of wafer is desired, physical properties other than those listed in the table of requirements shall not be included in the purchase specification.

These specifications do not cover the requirements for the following related silicon materials and wafers:

• Polycrystalline silicon (see SEMI M16 or JEITA EM-3601A),

• Epitaxial wafers (see SEMI M62),

• Epitaxial wafers with buried layer (see SEMI M61),

• Test wafers (see SEMI M8),

• Premium wafers (see SEMI M24),

• Reclaimed wafers (see SEMI M38),

• Annealed wafers (see SEMI M57),

• SOI wafers (see SEMI M41, SEMI M77, or JEITA EM-3603B), and

• Solar-grade silicon wafers (see SEMI M6).

They do, however, provide the ordering information for test, premium, and reclaimed wafers, as well as the ordering information for the polished substrates and starting wafers used to prepare epitaxial, annealed, and SOI wafers.

For referee purposes, U.S. customary units shall be used for wafers of 2 inch and 3 inch nominal diameters, and SI (system international, commonly called metric) units for 100 mm and larger diameter wafers.

NOTICE: SEMI Standards and Safety Guidelines do not purport to address all safety issues associated with their use. It is the responsibility of the users of the documents to establish appropriate safety and health practices, and determine the applicability of regulatory or other limitations prior to use.

Purpose 

Single crystal silicon wafers are utilized for essentially all integrated circuits and many other semiconductor devices. To permit common processing equipment to be used in multiple device fabrication lines, it is essential for the wafer dimensions to be standardized.

In addition, as technology advances to smaller and smaller dimensions for the elements of high-density integrated circuits, it has become of interest to standardize additional properties of the wafers.

This Specification provides the essential dimensional and certain other common characteristics of silicon wafers, including polished wafers as well as substrates for epitaxial and certain other kinds of silicon wafers.
Additional Supplemental Documents

Prices subject to change without notice.
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